Earlier Work
Overview
Before joining VUB in November 2023 I spent about a decade building real-time and system software: first at the PARTS research centre of the Université Libre de Bruxelles and its spin-off HIPPEROS (2012–2019), where I did my Ph.D. and helped design a multi-core RTOS from scratch, then as an Operating System Software Architect at the Huawei Dresden Research Center (2019–2023), working on synchronisation primitives and NUMA-aware locking for weak-memory multicore servers. This page keeps that earlier work reachable; the Research page describes what SPELLS² does today.
Projects
HIPPEROS
High Performance Parallel Embedded Real-time Operating System: a multitasking RTOS designed from scratch for critical, hard real-time applications on multi-core embedded platforms. Micro-kernel with an asymmetric master/slave architecture (one core runs the kernel; the others serve real-time tasks with minimal interference), highly configurable and modular. Rebranded Maestro RTOS in 2018. I worked on the design, development and validation of the kernel, drivers, libraries and application code, which also formed the experimental basis of my Ph.D.
Tulipp
Towards Ubiquitous Low-power Image Processing Platforms: a reference platform (hardware, real-time operating system, tool chain and guidelines) for high-performance, energy-efficient embedded vision, validated on three use cases (medical X-ray imaging, automotive ADAS pedestrian detection, UAV obstacle avoidance). I planned and followed the project milestones for the operating-system requirements, implemented Tulipp features in HIPPEROS and organised the international integration weeks bringing platform, OS, tool-chain and use-case partners together.
CRAFTERS
ConstRaint and Application driven Framework for Tailoring Embedded Real-time Systems: 26 academic and industry partners from ten EU countries working on methods, tools and reference platforms for real-time applications on heterogeneous, networked embedded many-core systems. ULB PARTS and MangoGem took part with support from Innoviris (Brussels Region). My early work at PARTS on the HIPPEROS kernel took place in this context.
Huawei Dresden Research Center
Verified and optimised synchronisation primitives for weak memory models on Arm servers, and NUMA-aware lock design for large multicore machines. This work led to the VSync (ASPLOS 2021), CLoF (SOSP 2021) and HMCS (NETYS 2021) papers and the compact NUMA-aware locks technical note; it is the direct ancestor of the current work on lock design and performance evaluation in SPELLS².
Ph.D. Thesis
Optimisation of Performance Metrics of Embedded Hard Real-Time Systems using Software/Hardware Parallelism, Université Libre de Bruxelles, defended 17 October 2018.
The thesis studies operating-system-level techniques that exploit hardware parallelism through parallel software to boost the performance of embedded applications and reduce their energy consumption while meeting strict timing requirements. It combines theoretical results (an offline polynomial-time optimal processor/frequency-selection algorithm for parallel real-time tasks, with simulated power reductions up to a factor 36 over the optimal non-parallel approach) with measurement-based validation on a real embedded platform running HIPPEROS, showing that increasing the degree of intra-task parallelism leads to better energy savings for the same real-time workload.
Selected Talks
- The HIPPEROS RTOS: a song of research and development, FOSDEM 2020, microkernel devroom, Brussels, 2 February 2020. Slides · FOSDEM page (with recording)
Earlier Service
- Program Committee member, RTNS 2020
- Program Chair, Junior Workshop on Real-Time Computing (JRWRTC 2019, co-located with RTNS 2019)
Credits
- The original design of this website (2012–2026) was by Over the Wembo; the current site keeps its circuit-board identity